The RIBBBIT65 - Overview

The RIBBBIT65 - Overview

The RIBBBIT65 is an 8-bit microcomputer based on the Western Design Center W65C02 CPU.

The goal of developing the RIBBBIT65 was undertaken as an autodidactic exercise to understand 6502 hardware and machine language, implement a simple operating system, and provide a means for interfacing with common peripherals for further investigations.

The RIBBBIT65 does not attempt to conform to the architecture of any existing commercially-marketed "home computer" or "personal computer" or try to be compatible with them.   The RIBBBIT65 does not currently (as of December, 2021) use any "high level" programming languages, but boots to a "Monitor" which allows the user to read from and write to memory, and run other 6502 machine language programs in memory.  The VASM assembler has proved to be an invaluable tool in developing software for the RIBBBIT65.

The base design of the RIBBBIT65 incorporates 32K of ROM ($8000-$FFFF) and 32K of RAM ($0000-$7FFF), with memory addressable IO in the $6000-$61FF range (near the top of RAM), and the full system bus exposed for expansion.  This constitutes the "RIBBBIT65_CORE".  It has no peripherals.  The intention is that, other than the basic memory map, there are no architectural constraints, and the "CORE" can be used as a basis for a variety of applications.  The current version of the RIBBBIT65_CORE is the RIBBBIT65_COREplus, which includes some power and signaling flexibility for use in a lab or educational setting.

The RIBBBIT65_COREplus (rev 0.1)


Currently, a RIBBBIT65 "Reference System" is in development, which includes the following features:

  • CoreROM - Includes startup and initialization routines, a "Common IO Handler", system routines, and a monitor program.  Depending on available space in ROM once currently planned functionality is developed and optimized, a port of Tiny BASIC may find its way into the CoreROM.
  • Pageable ROM - This allows for user-installable programs to be "paged into" the bottom 8K of ROM ($8000-$9FFF) by way of 3 x 32K EEPROMs (e.g. AT28C256) and an 8K cartridge.
  • SystemIO - Peripherals the CoreROM expects to see are either resident on, or attached to, the SystemIO board.  These peripherals are:
    • Master Interrupt Controller
    • Serial Console (interrupt capable)
    • Keyboard interface (interrupt capable)
    • Boot/System Storage (interrupt capable)
    • 2 x general purpose RS-232 serial ports (interrupt capable)
    • 2 x general purpose W65C22 Versatile Interface Adapters (interrupt capable)
    • Multi-line LCD Character Display (through its own VIA)
    • Alternate/Second Storage (read-on-poll only)
    • 2 x general purpose RS-232 serial ports (read-on-poll only)
    • 1 I2C general purpose controller (read-on-poll only)
    • 1 SPI general purpose controller (read-on-poll only)
    • Video Display Adapter (planned, but not yet developed)
  • UserIO - Offers users the opportunity to develop and interface up to 15 additional peripherals, 7 of which can interrupt the CPU.
The RIBBBIT65 SystemIO board (rev 0.1)


As development of the RIBBBIT65 Reference System hardware matures and stabilizes, work is beginning on designing a derivative system to fit in a Mini-ITX PC case and use ATX power and front panel connections.  Depending on constraints, some or all of the SystemIO capability will be incorporated on the RIBBBIT65-ITX

As part of the early development of the RIBBBIT65's IO capability, a "generic IO board" (nicknamed "Jenny-O") was created with its own selectable address decoding, a W65C22 VIA with both ports exposed as pin sockets, and a 40-pin RIBBBIT65 Bus connector.  Subsequently, a daughter card was created to sit in place of the W65C22 VIA, and provide a 6551 ACIA (WDC's serial UART).  In this way, the core functionality of WDC's peripheral set can be used and reconfigured as needed.  Additionally, since the Jenny-O board has the address decoding onboard, and it can be assembled without the VIA, virtually any other peripheral can operate with 4 or fewer register selects can be adapted to take advantage of the Jenny-O's address decoding and bus connection.

In addition to updates here on the RIBBBITN3RDing blog, you can see videos relating to the RIBBBIT65's development on our YouTube Channel and short posts about minor milestones and frustrations on our Facebook page.  If you're interested in 6502 retrocomputing as a hobby, you might enjoy the "6502 CPU Family" group on Facebook as well.



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